Former Graduate Students and their PhD Dissertations

Links to pdfs are provided for many of the dissertations listed below. Others can usually be obtained from UMI dissertation services or the University of Michigan.

  1. “Architecting Memory System for Emerging Technologies”, Byoungchan Oh, The University of Michigan, 2017. (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Memory Architect, Intel Federal LLC.
  2. “Heterogeneous Mobile Platform Characterization and Accelerator Design”, Cao Gao, The University of Michigan, 2017.  (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Software Engineer, Google Inc.
  3. “Studies in Exascale Computer Architecture: Interconnect, Resiliency, and Checkpointing, Sandunmalee Nilmini Abeyratne, The University of Michigan, 2017. (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Performance Architect Intel Corp.
  4. “Designing Flexible, Energy Efficient and Secure Wireless Solutions for the Internet of Things”, Yajing Chen, The University of Michigan, 2017.  (Co-chairman Hun-Seok Kim)
 [pdf] Current position: Digital Design Engineer, Intel Corp.
  5. “Datacenter Design for Future Cloud Radio Access Network”, Qi Zheng, The University of Michigan, 2016. (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Software Engineer, Square Inc.
  6. “Physically Dense Server Architectures”, Anthony Thomas Gutierrez, The University of Michigan, 2015. [pdf] Current position: Member of Technical Staff, Design Engineer at AMD Research, Seattle Washington.
  7. “Scaling High-Performance Interconnect Architectures to Many-Core Systems”, Korey LaMar Sewell, The University of Michigan, 2012. [pdf] Current position: CPU Performance Architect, Apple Inc.
  8. “Near-Threshold Computing: From Single Core to Many-Core Energy Efficient Architectures”, Ronald G. Dreslinski Jr., The University of Michigan, 2011. [pdf] Current position: Assistant Professor Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor.
  9. “Energy-efficient Architecture For Mobile Signal Processing”, Sangwon Seo, The University of Michigan, 2011. [pdf] Current position: Qualcomm Inc.
  10. “Architecture And Analysis For Next Generation Mobile Signal Processing”, Mark Woh, The University of Michigan, 2011. [pdf] Current position: Qualcomm Inc.
  11. “A Hardware/Software Approach for Alleviating Scalability Bottlenecks in Transactional Memory Applications”, Geoffrey Wyman Blake, The University of Michigan, 2011. [pdf] Current position: Staff Research Engineer, Arm Ltd.
  12. “Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques”, David Andrew Roberts, The University of Michigan, 2010. [pdf] Current position: Senior Member of Technical Staff at AMD.
  13. “Disaggregated Memory Architectures for Blade Servers”, Kevin Te-Ming Lim, The University of Michigan, 2010. (Co-chairman Steven Reinhardt)[pdf]
  14. “Cache Resource Allocation in Large Scale Chip Multiprocessors”, Lisa Rufeng Hsu, The University of Michigan, 2010. (Co-chairman Steven Reinhardt)[pdf] Current position: Staff Engineer in Qualcomm Datacenter Technologies.
  15. “Full-System Critical-Path Analysis and Performance Prediction”, Ali Ghassan Saidi, The University of Michigan, 2009. (Co-chairman Steven Reinhardt)[pdf]
  16. “Microarchitecture Choices and Tradeoffs For Maximizing Processing Efficiency”, Deborah T Marr, The University of Michigan, 2008. [pdf]
  17. “Realizing Software Defined Radio – A Study in Designing Mobile Supercomputers”, Yuan Lin, The University of Michigan, 2008. (Co-chairman Scott Mahlke)[pdf]
  18. “The Fast, Efficient, And Representative Benchmarking of Future Microarchitectures”, Jeffrey Stuart Ringenberg, The University of Michigan, 2008. [pdf] Current position: Lecturer IV Dept Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor.
  19. “Architecting Energy Efficient Servers”, Tae Ho Kgil, The University of Michigan, 2007. [pdf]
  20. “A Baseband Processor for Software Defined Radio Terminals”, Hyunseok Lee, The University of Michigan, 2007. [pdf] Current position: Assistant Research Professor Arizona State University, Tempe Arizona.
  21. “Improving Performance and Energy Consumption in Region-Based Caching Architectures”, Michael J Geiger, The University of Michigan, 2006. (Co-chairman Gary Tyson)[pdf]
  22. “Application-Specific Architecture Framework for High-Performance Low-Power Embedded Computing”, Allen Chao-Hung Cheng, The University of Michigan, 2006. (Co-chairman Gary Tyson)[pdf]
  23. “Virtualizing Register Context”, David W Oehmke, The University of Michigan, 2005. [pdf]
  24. “Circuit and Microarchitectural Techniques for Processor On-Chip Cache Leakage Power Reduction”, Nam Sung Kim, The University of Michigan, 2004. [pdf]
  25. “Design, Implementation and use of an Experimental Compiler for Computer Architecture Research”, David Anthony Greene, The University of Michigan, 2003. [pdf]
  26. “Limits and Misconceptions in Branch Prediction”, Avinoam Nomik Eden, The University of Michigan, 2001. [pdf]
  27. “Compiler and Microarchitecture Mechanisms for Exploiting Registers to Improve Memory Performance”, Matthew Allan Postiff, The University of Michigan, 2001. [pdf] Current position: Pastor of the Fellowship Bible Church, Ann Arbor, Michigan.
  28. “Automatic Monitoring for Interactive Performance and Power Reduction”, Krisztian Flautner, The University of Michigan, 2001. [pdf] Current position: VP Technology at Arm Holdings.
  29. “Modern DRAM Architectures”, Brian Thomas Davis, The University of Michigan, 2001. (Co-chairman Bruce Jacob)[pdf] Current position: Associate Professor Electrical Engineering, Embry-Riddle Aeronautical University, Prescott Arizona.
  30. “Efficient Execution of Compressed Programs”, Charles Robert Lefurgy, The University of Michigan, 2000. [pdf]
  31. “Pseudo-Vector Machines for Embedded Applications”, Lea Hwang Lee, The University of Michigan, 2000. [pdf] Current position: DSP Architect, ZTE Corp.
  32. “The Impact of Computer Architectures Features on Image Processing Application Execution Times: A Case Study Using MPEG Image Sequence Compression on the IMB SP2”, Jeremy Alan Salinger, The University of Michigan, 2000. (Co-chairman Gregory Wakefield)[pdf]
  33. “Functional Design Verification for Microprocessors by Error Modeling”, David Van Campenhout, The University of Michigan, 1999. [pdf]
  34. “Improving Processor Performance by Dynamically Pre-Processing the Instruction Stream”, James David Dundas, The University of Michigan, 1998. [pdf]
  35. “Optimizing High Performance Dynamic Branch Predictors”, Chih-Chieh Lee, The University of Michigan, 1997. [pdf]
  36. “Enhancing Instruction Fetching Mechanism Using Data Compression”, I-Cheng Chen, The University of Michigan, 1997. [pdf]
  37. “Software-Oriented Memory-Management Design”, Bruce Ledley Jacob, The University of Michigan, 1997. [pdf] Current position: Professor of Electrical & Computer Engineering, University of Maryland, College Park, Maryland.
  38. “Reducing the Penalty of Branch and Load Hazards in Pipelined Microprocessors”, Michael Leonard Golden, The University of Michigan, 1995. [pdf]
  39. “OS/Architecture Interactions and Influence on Computer Architecture”, David Frederick Nagle, The University of Michigan, 1995. [pdf]
  40. “Cache Behavior in the Presence of Speculative Execution – The Benefits of Misprediction”, James E Pierce, The University of Michigan, 1995. [pdf]
  41. “Architectural Macro-Modeling of Processor Memory Components”, Ghazanfar Ali Khan, The University of Michigan, 1995. [pdf]
  42. “Trace-driven Memory Simulation”, Richard Albert Uhlig, The University of Michigan, 1995. [pdf] Current position: Intel Fellow and Director of Systems and Software Research in Intel Labs.
  43. “Architectural Trade-offs in a Latency Tolerant Gallium Arsenide Microprocessor”, Michael Douglas Upton, The University of Michigan, 1994. (Co-chairman Richard Brown)[pdf]
  44. “Loop Optimization Techniques on Multi-Issue Architectures”, Dan Richard Kaiser, The University of Michigan, 1994. [pdf]
  45. “Technology-Organization Trade-offs in the Architecture of a High Performance Processor”, Oyekunle Ayinde Olukotun, The University of Michigan, 1991. [pdf] Current position: Professor of Electrical Engineering and Computer Science at Stanford University and Director of the Pervasive Parallelism Laboratory.
  46. “Run-Time Support for Parallel Programs”, Russell Mace Clapp, The University of Michigan, 1991. [pdf]
  47. “Design of a Non-Interfering Debugger for Embedded Real-Time Systems”, Venu Prabhakar Banda, The University of Michigan, 1990. (Co-chairman Richard Volz)[pdf]
  48. “Machine Recognition and Attitude Estimation of Three-Dimensional Objects”, Paul Gunther Gottschalk III, The University of Michigan, 1990. [pdf]
  49. “A Distributed Real-Time Language and Its Operational Semantics”, Padmanabhan Krishnan, The University of Michigan, 1989. (Co-chairman Richard Volz)[pdf]
  50. “Parallel Processing of Best-First Branch and Bound Algorithms on Distributed Memory Multiprocessors”, Tarek Saad Abdel-Rahman, The University of Michigan, 1989. [pdf] Current position: Professor at The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of  Toronto, Ontario, Canada.
  51. “Bus and Cache Memory Organizations for Multiprocessors”, Donald Charles Winsor, The University of Michigan, 1989. [pdf] Current position: Departmental Computing Organization Coordinator; Adjunct Professor Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor.
  52. “High Performance Communications for Hypercube Multiprocessors”, Gregory Dean Buzzard, The University of Michigan, 1988. [pdf]
  53. “Recognition of Partially Occluded Parts”, Jerry Lee Turney, The University of Michigan, 1986. [pdf]
  54. “A Study in Memory Interference Models”, H.B. Humoud, The University of Michigan, 1985. [pdf]
  55. “A Stochastic Model of Multiprocessing”, Brad Alan Makrucki, The University of Michigan, 1984. [pdf]