Past Graduate Students and their PhD Dissertations

Links to pdfs are provided for many of the dissertations listed below. Others can usually be obtained from UMI dissertation services or the University of Michigan.

  1. Combating Randomness: Towards Efficient Data-Intensive Applications Using Software-Hardware Co-Design”, Haojie Ye, The University of Michigan, 2024. [pdf] (Co-chairman Nishil Talati) Current position: Senior Deep Learning Architect at NVIDIA [pic] Haojie c. 2024
  2. “Optimizing Emerging Applications Through Software Hardware Co-Design”, Yuhan Chen, The University of Michigan, 2024. [pdf] (Co-chairman Nishil Talati) Current position: Research Scientist Meta MTIA project [pic] Yuhan c. 2024
  3. “Optimizing Emerging Graph Applications Using Hardware-Software Co-Design”, Nishil Talati, The University of Michigan, 2022. [pdf] (Co-chairman Ronald G. Dreslinski Jr.) Current position: Assistant Research Scientist Dept Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor. [pic] Nishil c. 2022
  4. “Optimizing Sparse Linear Algebra on Reconfigurable Architecture”, Dong-hyeon Park, The University of Michigan, 2021. [pdf] Current position: Military service in the Republic of Korea Army. [pic] Dong-hyeon c. 2021
  5. “Rethinking Context Management of Data Parallel Processors in an Era of Irregular Computing”, Jonathan Beaumont, The University of Michigan, 2019. [pdf] Current position: Lecturer IV Dept Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor. [pic] Jon c. 2019
  6. “Architecting Memory System for Emerging Technologies”, Byoungchan Oh, The University of Michigan, 2017. (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Memory Architect, Intel Federal LLC. [pic] Byounchan c. 2017
  7. “Heterogeneous Mobile Platform Characterization and Accelerator Design”, Cao Gao, The University of Michigan, 2017.  (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Software Engineer, Google Inc.
  8. “Studies in Exascale Computer Architecture: Interconnect, Resiliency, and Checkpointing, Sandunmalee Nilmini Abeyratne, The University of Michigan, 2017. (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Performance Architect Intel Corp. [pic] Mini c. 2017.
  9. “Designing Flexible, Energy Efficient and Secure Wireless Solutions for the Internet of Things”, Yajing Chen, The University of Michigan, 2017.  (Co-chairman Hun-Seok Kim) [pdf] Current position: Digital Design Engineer, Intel Corp. [pic] Yajing c. 2019
  10. “Datacenter Design for Future Cloud Radio Access Network”, Qi Zheng, The University of Michigan, 2016. (Co-chairman Ronald G. Dreslinski Jr.) [pdf] Current position: Software Engineer, Square Inc. [pic] Qi c. 2016
  11. “Physically Dense Server Architectures”, Anthony Thomas Gutierrez, The University of Michigan, 2015. [pdf] Current position: Member of Technical Staff, Design Engineer at AMD Research, Seattle Washington.
  12. “Scaling High-Performance Interconnect Architectures to Many-Core Systems”, Korey LaMar Sewell, The University of Michigan, 2012. [pdf] Current position: CPU Performance Architect, Apple Inc. [pic] Korey c. 2012
  13. “Near-Threshold Computing: From Single Core to Many-Core Energy Efficient Architectures”, Ronald G. Dreslinski Jr., The University of Michigan, 2011. [pdf] Current position: Assistant Professor Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor.  [pic] Ron c. 2011
  14. “Energy-efficient Architecture For Mobile Signal Processing”, Sangwon Seo, The University of Michigan, 2011. [pdf] Current position: Qualcomm Inc.
  15. “Architecture And Analysis For Next Generation Mobile Signal Processing”, Mark Woh, The University of Michigan, 2011. [pdf] Current position: Qualcomm Inc.
  16. “A Hardware/Software Approach for Alleviating Scalability Bottlenecks in Transactional Memory Applications”, Geoffrey Wyman Blake, The University of Michigan, 2011. [pdf] Current position: Senior Systems Engineer, Amazon Web Services.
  17. “Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques”, David Andrew Roberts, The University of Michigan, 2010. [pdf] Current position: Senior Member of Technical Staff at AMD.
  18. “Disaggregated Memory Architectures for Blade Servers”, Kevin Te-Ming Lim, The University of Michigan, 2010. (Co-chairman Steven Reinhardt)[pdf] Current position: Google Inc.
  19. “Cache Resource Allocation in Large Scale Chip Multiprocessors”, Lisa Rufeng Hsu, The University of Michigan, 2010. (Co-chairman Steven Reinhardt)[pdf] Current position: Google Inc. [pic] Lisa c. 2011
  20. “Full-System Critical-Path Analysis and Performance Prediction”, Ali Ghassan Saidi, The University of Michigan, 2009. (Co-chairman Steven Reinhardt)[pdf] Current position: Principle Systems Engineer, Amazon Web Services. [pic] Ali c. 2011
  21. “Microarchitecture Choices and Tradeoffs For Maximizing Processing Efficiency”, Deborah T Marr, The University of Michigan, 2008. [pdf] Currrent positon: Senior Principal Engineer and Director of the Accelerator Architecture Research Lab, Intel Corporation.
  22. “Realizing Software Defined Radio – A Study in Designing Mobile Supercomputers”, Yuan Lin, The University of Michigan, 2008. (Co-chairman Scott Mahlke)[pdf] Current position: Senior Principal Engineer, Compiler Technical Lead, Sambanova Systems. [pic] Yuan c. 2008
  23. “The Fast, Efficient, And Representative Benchmarking of Future Microarchitectures”, Jeffrey Stuart Ringenberg, The University of Michigan, 2008. [pdf] Current position: Lecturer IV Dept Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor.  [pic] Jeff c. 2008
  24. “Architecting Energy Efficient Servers”, Tae Ho Kgil, The University of Michigan, 2007. [pdf] Currrent positon: Corporate Vice President at Samsung Electronics. [pic] Tae-Ho c. 2007
  25. “A Baseband Processor for Software Defined Radio Terminals”, Hyunseok Lee, The University of Michigan, 2007. [pdf] Current position: Assistant Research Professor Arizona State University, Tempe Arizona. [pic] Hyunseok c. 2007
  26. “Improving Performance and Energy Consumption in Region-Based Caching Architectures”, Michael J Geiger, The University of Michigan, 2006. (Co-chairman Gary Tyson) [pdf] Current position: Assistant Teaching Professor University of Massachusetts Lowell Massachusetts. [pic] Mike c. 2006
  27. “Application-Specific Architecture Framework for High-Performance Low-Power Embedded Computing”, Allen Chao-Hung Cheng, The University of Michigan, 2006. (Co-chairman Gary Tyson)[pdf] [pic] Allen c. 2006
  28. “Virtualizing Register Context”, David W Oehmke, The University of Michigan, 2005. [pdf] Current position: Principal Engineer, Cray Inc. Minneapolis, Minnesota. [pic] Dave c. 1995
  29. “Circuit and Microarchitectural Techniques for Processor On-Chip Cache Leakage Power Reduction”, Nam Sung Kim, The University of Michigan, 2004. [pdf] Current position: Senior Vice-President Samsung, on leave from Professor, Electrical and Computer Engineering, University of Illinois, Champaign-Urbana, Illinois.
  30. “Design, Implementation and use of an Experimental Compiler for Computer Architecture Research”, David Anthony Greene, The University of Michigan, 2003. [pdf] Current position: Senior Compiler Engineer, Cray Inc. Minneapolis, Minnesota. [pic] Dave c. 2003
  31. “Limits and Misconceptions in Branch Prediction”, Avinoam Nomik Eden, The University of Michigan, 2001. [pdf] Current position: Serial Entrepreneur.
  32. “Compiler and Microarchitecture Mechanisms for Exploiting Registers to Improve Memory Performance”, Matthew Allan Postiff, The University of Michigan, 2001. [pdf] Current position: Pastor of the Fellowship Bible Church, Ann Arbor, Michigan. [pic]  Matt c. 2001
  33. “Automatic Monitoring for Interactive Performance and Power Reduction”, Krisztian Flautner, The University of Michigan, 2001. [pdf] Current position: CEO  Banzai Cloud. [pic] Kris c. 2001
  34. “Modern DRAM Architectures”, Brian Thomas Davis, The University of Michigan, 2001. (Co-chairman Bruce Jacob)[pdf] Current position: Senior Vice President, Sales and Marketing HAECO Americas. [pic]  Brian c. 2001
  35. “Efficient Execution of Compressed Programs”, Charles Robert Lefurgy, The University of Michigan, 2000. [pdf] [pic] Charles c.2000
  36. “Pseudo-Vector Machines for Embedded Applications”, Lea Hwang Lee, The University of Michigan, 2000. [pdf] Current position: DSP Architect, ZTE Corp.
  37. “The Impact of Computer Architectures Features on Image Processing Application Execution Times: A Case Study Using MPEG Image Sequence Compression on the IMB SP2”, Jeremy Alan Salinger, The University of Michigan, 2000. (Co-chairman Gregory Wakefield)[pdf]
  38. “Functional Design Verification for Microprocessors by Error Modeling”, David Van Campenhout, The University of Michigan, 1999. [pdf]  Current position: Senior Staff Software Engineer at Xilinx. [pic] David c. 1999
  39. “Improving Processor Performance by Dynamically Pre-Processing the Instruction Stream”, James David Dundas, The University of Michigan, 1998. [pdf] [pic] Jim c. 1998
  40. “Optimizing High Performance Dynamic Branch Predictors”, Chih-Chieh Lee, The University of Michigan, 1997. [pdf] [pic] Chih-Chieh c. 1997
  41. “Enhancing Instruction Fetching Mechanism Using Data Compression”, I-Cheng Chen, The University of Michigan, 1997. [pdf] [pic] I-Cheng c. 1997
  42. “Software-Oriented Memory-Management Design”, Bruce Ledley Jacob, The University of Michigan, 1997. [pdf] Current position: Professor of Cyber Science,The United States Naval Academy, Annapolis, Maryland. [pic] Bruce c. 2001
  43. “Reducing the Penalty of Branch and Load Hazards in Pipelined Microprocessors”, Michael Leonard Golden, The University of Michigan, 1995. [pdf]
  44. “OS/Architecture Interactions and Influence on Computer Architecture”, David Frederick Nagle, The University of Michigan, 1995. [pdf] [pic] Rich+Dave c. 1995
  45. “Cache Behavior in the Presence of Speculative Execution – The Benefits of Misprediction”, James E Pierce, The University of Michigan, 1995. [pdf]
  46. “Architectural Macro-Modeling of Processor Memory Components”, Ghazanfar Ali Khan, The University of Michigan, 1995. [pdf]
  47. “Trace-driven Memory Simulation”, Richard Albert Uhlig, The University of Michigan, 1995. [pdf] Current position: Intel Fellow and Managing Director of  Intel Labs.  [pic] Rich+Dave c. 1995
  48. “Architectural Trade-offs in a Latency Tolerant Gallium Arsenide Microprocessor”, Michael Douglas Upton, The University of Michigan, 1994. (Co-chairman Richard Brown)[pdf]
  49. “Loop Optimization Techniques on Multi-Issue Architectures”, Dan Richard Kaiser, The University of Michigan, 1994. [pdf]
  50. “Technology-Organization Trade-offs in the Architecture of a High Performance Processor”, Oyekunle Ayinde Olukotun, The University of Michigan, 1991. [pdf] Current position: Professor of Electrical Engineering and Computer Science at Stanford University, Director of the Pervasive Parallelism Laboratory, and Founder of Sambanova Systems. [pic] Kunle c. 2015
  51. “Run-Time Support for Parallel Programs”, Russell Mace Clapp, The University of Michigan, 1991. [pdf]
  52. “Design of a Non-Interfering Debugger for Embedded Real-Time Systems”, Venu Prabhakar Banda, The University of Michigan, 1990. (Co-chairman Richard Volz)[pdf]
  53. “Machine Recognition and Attitude Estimation of Three-Dimensional Objects”, Paul Gunther Gottschalk III, The University of Michigan, 1990. [pdf]
  54. “A Distributed Real-Time Language and Its Operational Semantics”, Padmanabhan Krishnan, The University of Michigan, 1989. (Co-chairman Richard Volz)[pdf] Current position: Director Research at Oracle Labs in Brisbane, Australia. [pic] Paddy Krishnan c. 2019.
  55. “Parallel Processing of Best-First Branch and Bound Algorithms on Distributed Memory Multiprocessors”, Tarek Saad Abdel-Rahman, The University of Michigan, 1989. [pdf] Current position: Professor at The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of  Toronto, Ontario, Canada. [pic] Tarek c. 2005
  56. “Bus and Cache Memory Organizations for Multiprocessors”, Donald Charles Winsor, The University of Michigan, 1989. [pdf] Current position: Departmental Computing Organization Coordinator; Adjunct Professor Department of Electrical Engineering and Computer Science, The University of Michigan, Ann Arbor. [pic] Don c. 2015
  57. “High Performance Communications for Hypercube Multiprocessors”, Gregory Dean Buzzard, The University of Michigan, 1988. [pdf] Current position: A9.com, Infrastructure Search Team Leader, Palo Alto, CA. [pic] Greg c.1988
  58. “Recognition of Partially Occluded Parts”, Jerry Lee Turney, The University of Michigan, 1986. [pdf]
  59. “A Study in Memory Interference Models”, H.B. Humoud, The University of Michigan, 1985. [pdf]
  60. “A Stochastic Model of Multiprocessing”, Brad Alan Makrucki, The University of Michigan, 1984. [pdf]